Modeling of RF CMOS Devices for Wireless System-on-a-Chip Applications
Publication Date
4-2003
Type of Culminating Activity
Thesis
Degree Title
Master of Science in Engineering, Electrical Engineering
Department
Electrical and Computer Engineering
Major Advisor
Stephen Parke
Abstract
The implementation of wireless System-On-a-Chip (SOC) applications in today's world has raised the bar for high performance front-end radio frequency integrated circuits (RFICs). CMOS technology has been widely used in high-speed logic and low- voltage applications, but has yet to claim the title as the supreme option for mixed-signal and RF devices integrated on a single chip. This thesis will investigate and attempt to model various RF CMOS devices ranging from passive devices to active devices. Using several sophisticated measurement, fabrication and design techniques, this study shows CMOS-based technologies will demonstrate extremely adequate logic, mixed-signal and RF capabilities, therefore facilitating the option for enabling stringent SOC applications for the next generation wireless communication systems.
Recommended Citation
Burke, Franklyn George, "Modeling of RF CMOS Devices for Wireless System-on-a-Chip Applications" (2003). Boise State University Theses and Dissertations. 518.
https://scholarworks.boisestate.edu/td/518