Abstract Title

Deep Learning Based Side Channel Attacks on Hardware Implementations of SCHWAEMM and GIFT-COFB

Additional Funding Sources

This research has been sponsored by the National Science Foundation under Award No. 1950599.

Abstract

The expansion of the Internet of Things (IoT) raises the concern of security measures on resource-constrained devices susceptible to side-channel attacks (SCA). In 2016, The National Institute for Standard and Technology (NIST) initiated a process to solicit, evaluate, and standardize lightweight cryptographic algorithms suitable for use in resource-constrained devices, where the performance of current NIST cryptographic standards is not acceptable. This work investigates side-channel vulnerabilities of masked and unmasked versions of Schwaemm and GIFT, two of the ten lightweight cryptographic algorithms selected by NIST as finalists. To test the resilience of Schwaemm and GIFT against side-channel attacks, we apply Correlation Power Analysis (CPA) and Deep Learning Power Analysis (DLPA) to their hardware implementations.

This document is currently not available here.

Share

COinS
 

Deep Learning Based Side Channel Attacks on Hardware Implementations of SCHWAEMM and GIFT-COFB

The expansion of the Internet of Things (IoT) raises the concern of security measures on resource-constrained devices susceptible to side-channel attacks (SCA). In 2016, The National Institute for Standard and Technology (NIST) initiated a process to solicit, evaluate, and standardize lightweight cryptographic algorithms suitable for use in resource-constrained devices, where the performance of current NIST cryptographic standards is not acceptable. This work investigates side-channel vulnerabilities of masked and unmasked versions of Schwaemm and GIFT, two of the ten lightweight cryptographic algorithms selected by NIST as finalists. To test the resilience of Schwaemm and GIFT against side-channel attacks, we apply Correlation Power Analysis (CPA) and Deep Learning Power Analysis (DLPA) to their hardware implementations.