Jitter Injection Test on a High-Speed Serial Device

Document Type

Student Presentation

Presentation Date


Faculty Sponsor

Nader Rafla


Development of flash memory storage devices have always pushed towards increasing data transfer rates, whether through the use of multiple data lines or faster clock speeds. With data transfer rates increasing rapidly, testing these signals becomes a problem with the currently available test methods. There is no feasible way to test serial data transfer rates above certain speeds, so the team has been tasked with developing a test circuit to meet the specifications provided by Micron. An FPGA will be used to transmit and receive a high speed serial data signal. A stand-alone jitter injection circuit will be developed to test this data signal being sent from the FPGA. The jitter injection circuit will induce a controllable amount of jitter onto the data line, allowing the tester to examine the point at which the data transfer fails. The bit error rate will be calculated and displayed to let the tester know the point at which massive failures occur. Designing the jitter injection circuit to be stand-alone from the FPGA allows the tester to easily swap out the FPGA for another device if necessary. This jitter injection device will be very helpful to Micron, as it allows them to monitor the inherent jitter and delays of their high-speed serial signals.

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