Efficient Mitigation Technique for Black Hole Router Attack in Network-on-Chip
The Multiprocessor System-on-Chip (MPSoC) has widely engaged in embedded systems. The MPSoC is mainly composed of multi-cores connected through an on-chip interconnection, Known as Network-on-Chip (NoC), which offers an efficient and scalable interconnection platform. The MPSoC presents a large degree of parallelism, where several applications are executing on multiple processors sharing the same NoC platform. So, it has made the NoC a focal point for potential security attacks. In the modern semiconductor industry, many different parties take part in the system design. As a result, the NoC could be infected with a malicious circuit, known as Hardware Trojan (HT), to apply a Denial-of-Service (DoS) attack.
In this article, an HT threat model that applies a DoS attack by deliberately discarding the packets from the NoC is presented. The infected router that drops the packets is also known as Black Hole Router (BHR). A secure interconnection network against the BHR attack is presented. The proposed technique can detect, locate the BHR in runtime, and isolate it from the network routing by detouring the packets around the infected router. The designed model has been extended to reduce energy consumption during the BHR detection process. The experimental results demonstrate that the proposed energy-efficient runtime BHR detection has 1% and 2% throughput and energy consumption overheads, respectively.
Daoud, Luka and Rafla, Nader. (2022). "Efficient Mitigation Technique for Black Hole Router Attack in Network-on-Chip". Microprocessors and Microsystems, 94, 104658. https://doi.org/10.1016/j.micpro.2022.104658