Document Type

Conference Proceeding

Publication Date




A low-latency asynchronous interface for use in globally-asynchronous locally-synchronous (GALS) integrated circuits is presented. The interface is compact and does not alter the local clocks of the interfaced local clock domains in any way (unlike many existing GALS interfaces). Two applications of the interface to GALS systems are shown. The first is a single-chip shared-memory multiprocessor for generic supercomputing use. The second is an application-specific coprocessor for hardware acceleration of the Smith-Waterman algorithm. This is a bioinformatics algorithm used for sequence alignment (similarity searching) between DNA or amino acid (protein) sequences and sequence databases such as the recently completed human genome database.

Copyright Statement

This document was originally published by IEEE in 2004 IEEE Workshop on Microelectronics and Electron Devices. Copyright restrictions may apply. DOI: 10.1109/WMED.2004.1297347