Publication Date

8-2009

Date of Final Oral Examination (Defense)

6-8-2009

Type of Culminating Activity

Dissertation

Degree Title

Doctor of Philosophy in Electrical and Computer Engineering

Department

Electrical and Computer Engineering

Supervisory Committee Chair

R. Jacob Baker, Ph.D.

Supervisory Committee Member

Jimmy J. Browning, Ph.D.

Supervisory Committee Member

Kristy A. Campbell, Ph.D.

Supervisory Committee Member

Wan Kuang, Ph.D.

Abstract

Surface acoustic wave (SAW) technology has been utilized in numerous research and commercial devices since the practical implementation was enabled by the availability of suitable photolithographic techniques in the 1970s. With the traditional approach to implementing these devices the frequency response is established during manufacture. This dissertation proposes a different approach to implementing a SAW device. The SAW structure is added to the top of an integrated circuit so that the frequency response can be digitally controlled and the peak resonant frequency can be varied. The approach is based on implementing a phase-controlled interface between the SAW transducer fingers and the input and output signals. The methods described can be applied to SAW resonators used for applications such as filters, oscillators, signal processing, and material sensing where frequency agility is a benefit.

Two design architectures are proposed and verified with simulations, with one offering somewhat more predictable performance while the other offers the potential benefit of lower-power operation. The simulations are performed using a combination of SPICE and MATLAB whereby the MATLAB code translates a desired frequency to a set of phase assignments for the SAW fingers and launches the SPICE application to simulate the performance. The SPICE application uses a lossy transmission line as a coupled-mode electromagnetic system to simulate the piezoelectric electroacoustic system. Simulations were done with center frequencies of 200 MHz and 800 MHz. Theory predicts, and simulations verify, that using a 500nm CMOS process an oscillator can be implemented with frequencies up to 1 GHz and a resulting Q of approximately 600. Theory supports the possibility of operation up to 50 GHz with advanced circuits and finger widths of 45 nm.

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