Electrical and Computer Engineering Faculty Publications and PresentationsCopyright (c) 2016 Boise State University All rights reserved.
http://scholarworks.boisestate.edu/electrical_facpubs
Recent documents in Electrical and Computer Engineering Faculty Publications and Presentationsen-usWed, 04 May 2016 02:17:07 PDT3600Channel Estimation, Carrier Recovery, and Data Detection in the Presence of Phase Noise in OFDM Relay Systems
http://scholarworks.boisestate.edu/electrical_facpubs/314
http://scholarworks.boisestate.edu/electrical_facpubs/314Mon, 02 May 2016 14:07:29 PDT
Due to its time-varying nature, oscillator phase noise can significantly degrade the performance of channel estimation, carrier recovery, and data detection blocks in high-speed wireless communication systems. In this paper, we analyze joint channel, carrier frequency offset (CFO), and phase noise estimation plus data detection in orthogonal frequency division multiplexing (OFDM) relay systems. To achieve this goal, a detailed transmission framework involving both training and data symbols is presented. In the data transmission phase, a combtype OFDM symbol consisting of both pilots and data symbols is proposed to track phase noise over an OFDM frame. Next, a novel algorithm that applies the training symbols to jointly estimate the channel responses, CFO, and phase noise based on the maximum a posteriori criterion is proposed. Additionally, a new hybrid Cramér-Rao lower bound for evaluating the performance of channel estimation and carrier recovery algorithms in OFDM relay networks is derived. Finally, an iterative receiver for joint phase noise estimation and data detection at the destination node is derived. Extensive simulations demonstrate that the application of the proposed estimation and receiver blocks significantly improves the performance of OFDM relay networks in the presence of phase noise.
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Rui Wang et al.Development and Application of a Standstill Parameter Identification Technique for the Synchronous Generator
http://scholarworks.boisestate.edu/electrical_facpubs/313
http://scholarworks.boisestate.edu/electrical_facpubs/313Fri, 08 Apr 2016 11:35:05 PDT
This work presents the development of an offline standstill estimation technique, where the synchronous machine is locked at an arbitrary (but known) angle and is excited over a short period of time. The proposed time domain method requires few seconds of captured data in contrast to the well-known standard Standstill Frequency Response (SSFR) technique that could take more than 6 hours to conduct. This is based on nonlinear least squares estimation and algebraic elimination theory. The resulting algorithm is non-iterative where the data is used to construct polynomials that are solved for a finite number of roots which determine the electrical parameter values. Experimental results are presented showing the efficacy of the technique in furnishing the parameters of a salient pole synchronous machine.
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Ahmed M.A. Oteafy et al.Optimization of Flexible Ag-Chalcogenide Glass Sensors for Radiation Detection
http://scholarworks.boisestate.edu/electrical_facpubs/312
http://scholarworks.boisestate.edu/electrical_facpubs/312Thu, 24 Mar 2016 11:13:39 PDT
We demonstrate how the radiation response and performance of Ag-chalcogenide glass radiation sensors fabricated on a flexible substrate can be optimized by modifications of spacing between electrodes
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M. MitkovaTID Impact on Process Modified CBRAM Cells
http://scholarworks.boisestate.edu/electrical_facpubs/311
http://scholarworks.boisestate.edu/electrical_facpubs/311Thu, 24 Mar 2016 10:36:16 PDT
In this study it is shown that Conductive Bridging Random Access Memory (CBRAM) might be sensitive to Total Ionizing Dose (TID) depending on the manufacturing process. TID levels at which sensitivity occurs for one of the studied processes are still very high, showing that CBRAM technology is a very interesting solution for future Non Volatile Memory (NVM) technologies to be used in space.
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M. Ailavajhala et al.Leveraging Student Knowledge of DSP for Optical Engineering
http://scholarworks.boisestate.edu/electrical_facpubs/310
http://scholarworks.boisestate.edu/electrical_facpubs/310Thu, 24 Mar 2016 10:25:09 PDT
Students who are learning fundamental principles of optical engineering can take advantage of existing knowledge of digital signal processing to greatly facilitate mastery of the new topics. This paper describes how professors can take advantage of this opportunity.
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Cameron H.G. Wright et al.Effects of Pre-College Engineering Participation on First-Year Engineering Outcomes
http://scholarworks.boisestate.edu/electrical_facpubs/309
http://scholarworks.boisestate.edu/electrical_facpubs/309Thu, 24 Mar 2016 10:15:07 PDT
With the increased acceptance and inclusion of engineering as an area of study at the K-12 and the proliferation of outreach activities intended to increase students' interest in pursuing degrees and careers in engineering, first-year engineering students are increasingly arriving in university engineering programs with significant prior exposure to engineering content and practices. In this study, using a combination of a survey and follow-up transcript analysis, we explored the relationship between students' participation in pre-college engineering activities and their academic performance in their first year of studying engineering at a large research university. We found no significant relationships between either the type of pre-college engineering activity or the level of participation and students' grades in their first-year engineering classes. We did identify several trends in the data that suggest other areas of study, as well as changes to the data we request from students regarding their pre-college experiences.
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Noah Salzman et al.A CMOS Spiking Neuron for Brain-Inspired Neural Networks with Resistive Synapses and <em>In-Situ</em> Learning
http://scholarworks.boisestate.edu/electrical_facpubs/308
http://scholarworks.boisestate.edu/electrical_facpubs/308Wed, 16 Mar 2016 12:22:06 PDT
Nano-scale resistive memories are expected to fuel dense integration of electronic synapses for large-scale neuromorphic system. To realize such a brain-inspired computing chip, a compact CMOS spiking neuron that performs in-situ learning and computing while driving a large number of resistive synapses is desired. This work presents a novel leaky integrate-and-fire neuron design which implements the dual-mode operation of current integration and synaptic drive, with a single opamp and enables in-situ learning with crossbar resistive synapses. The proposed design was implemented in a 0.18μm CMOS technology. Measurements show neuron’s ability to drive a thousand resistive synapses, and demonstrate an in-situ associative learning. The neuron circuit occupies a small area of 0.01mm^{2} and has an energy-efficiency of 9.3pJ/spike/synapse.
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Xinyu Wu et al.Impact of Common Observations in Parallel Distributed Detection
http://scholarworks.boisestate.edu/electrical_facpubs/307
http://scholarworks.boisestate.edu/electrical_facpubs/307Wed, 09 Mar 2016 09:19:42 PST
Distributed detection with dependent observations is always a challenging problem. The problem of detection with shared information has many applications when sensors have overlapped measurements, e.g., when distributed detection is performed in a security system where sensors have overlapped coverages. For this shared information scenario, we investigate the distributed detection problem in parallel fusion networks. The design problem is how to best utilize the common information at both the local sensors and the fusion center to achieve best possible performance. We derive the necessary condition for the optimal sensor decision rules for all sensors. In addition, we investigate the system performance by comparing the optimal rules with suboptimal rules for distributed detection of a constant signal corrupted by Gaussian noise. The numerical results obtained by conducted examples con- firm the optimality of the derived decision rules.
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Hao Chen et al.Quantifying Print Quality for Practice
http://scholarworks.boisestate.edu/electrical_facpubs/306
http://scholarworks.boisestate.edu/electrical_facpubs/306Wed, 09 Mar 2016 09:14:09 PST
To aid in the process of evaluating print quality, five print quality metrics and methods to measure them have been developed. The attributes of interest are: (1) Edge quality, Sharpness, Detail, Raggedness; (2) Scatter, Particles, Halo, Character ghosts; (3) Readability, broken characters (4) Readability, touching characters; (5) Inverse text. The print quality is measured from a test chart containing typical text in a range of sizes and multiple fonts. The test chart is scanned on a commercial desk top scanner. Quantitative values are returned without human input or human surveys, but relate to human perception of these quantities.
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Elisa H. Barney Smith et al.BRCThe Performance Limit for Distributed Bayesian Estimation with Identical One-Bit Quantizers
http://scholarworks.boisestate.edu/electrical_facpubs/305
http://scholarworks.boisestate.edu/electrical_facpubs/305Tue, 08 Mar 2016 16:18:58 PST
In this paper, a performance limit is derived for a distributed Bayesian parameter estimation problem in sensor networks where the prior probability density function of the parameter is known. The sensor observations are assumed conditionally independent and identically distributed given the parameter to be estimated, and the sensors employ independent and identical quantizers. The performance limit is established in terms of the best possible asymptotic performance that a distributed estimation scheme can achieve for all possible sensor observation models. This performance limit is obtained by deriving the optimal probabilistic quantizer under the ideal setting, where the sensors observe the parameter directly without any noise or distortion. With a uniform prior, the derived Bayesian performance limit and the associated quantizer are the same as the previous developed performance limit and quantizers under the minimax framework, where the parameter is assumed to be fixed but unknown. This proposed performance limit under distributed Bayesian setting is compared against a widely used performance bound that is based on full-precision sensor observations. This comparison shows that the performance limit derived in this paper is comparatively much tighter in most meaningful signal to-noise ratio (SNR) regions. Moreover, unlike the unquantized observations performance limit which can never be achieved, this performance limit can be achieved under certain noise observation models.
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Xia Li et al.Dynamic Phase-Control of a Rising Sun Magnetron Using Modulated and Continuous Current
http://scholarworks.boisestate.edu/electrical_facpubs/304
http://scholarworks.boisestate.edu/electrical_facpubs/304Fri, 19 Feb 2016 09:35:27 PST
Phase-control of a magnetron is studied via simulation using a combination of a continuous current source and a modulated current source. The addressable, modulated current source is turned ON and OFF at the magnetron operating frequency in order to control the electron injection and the spoke phase. Prior simulation work using a 2D model of a Rising Sun magnetron showed that the use of 100% modulated current controlled the magnetron phase and allowed for dynamic phase control. In this work, the minimum fraction of modulated current source needed to achieve a phase control is studied. The current fractions (modulated versus continuous) were varied from 10% modulated current to 100% modulated current to study the effects on phase control. Dynamic phase-control, stability, and start up time of the device were studied for all these cases showing that with 10% modulated current and 90% continuous current, a phase shift of 180˚ can be achieved demonstrating dynamic phase control.
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Sulmer Fernandez-Gutierrez et al.Optimal Training Design and Individual Channel Estimation for MIMO Two-Way Relay Systems in Colored Environment
http://scholarworks.boisestate.edu/electrical_facpubs/303
http://scholarworks.boisestate.edu/electrical_facpubs/303Wed, 17 Feb 2016 10:54:21 PST
In this paper, while considering the impact of antenna correlation and the interference from neighboring users, we study the problem of channel estimation and training sequence design in multi-input multi-output (MIMO) two-way relaying (TWR) systems. To this end, we propose to decompose the bidirectional transmission links into two phases, i.e., the multiple access (MAC) and the broadcast (BC) phases. By deriving the optimal linear minimum mean-square-error estimators, the corresponding training design problems for the MAC and BC phases are formulated and solved. Subsequently, algorithms and, in some special cases, closed-form solutions for obtaining the optimal training sequences for channel estimation in TWR systems are derived. Moreover, to further reduce channel estimation overhead, the minimum required length of the training sequences are determined. Simulation results verify the effectiveness of the proposed training designs in improving channel estimation performance in TWR systems.
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Rui Wang et al.Channel Estimation and Optimal Training Design for Correlated MIMO Two-Way Relay Systems in Colored Environment
http://scholarworks.boisestate.edu/electrical_facpubs/302
http://scholarworks.boisestate.edu/electrical_facpubs/302Wed, 17 Feb 2016 10:39:27 PST
In this paper, while considering the impact of antenna correlation and the interference from neighboring users, we analyze channel estimation and training sequence design for multi-input multi-output (MIMO) two-way relay (TWR) systems. To this end, we propose to decompose the bidirectional transmission links into two phases, i.e., the multiple access (MAC) phase and the broadcasting (BC) phase. By considering the Kronecker-structured channel model, we derive the optimal linear minimum mean-square-error (LMMSE) channel estimators. The corresponding training designs for the MAC and BC phases are then formulated and solved to improve channel estimation accuracy. For the general scenario of training sequence design for both phases, two iterative training design algorithms are proposed that are verified to produce training sequences that result in near optimal channel estimation performance. Furthermore, for specific practical scenarios, where the covariance matrices of the channel or disturbances are of particular structures, the optimal training sequence design guidelines are derived. In order to reduce training overhead, the minimum required training length for channel estimation in both the MAC and BC phases are also derived. Comprehensive simulations are carried out to demonstrate the effectiveness of the proposed training designs.
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Rui Wang et al.Effects of Clustering Algorithms on Typographic Reconstruction
http://scholarworks.boisestate.edu/electrical_facpubs/301
http://scholarworks.boisestate.edu/electrical_facpubs/301Thu, 04 Feb 2016 14:24:45 PST
Type designers and historians studying the typefaces and fonts used in historical documents can usually only rely on available printed material. The initial wooden or metal cast fonts have mostly disappeared. In this paper we address the creation of character templates from printed documents. Images of characters scanned from Renaissance era documents are segmented, then clustered. A template is created from each obtained cluster of similar appearance characters. In order for subsequent typeface analysis tools to operate, the template should reduce the noise present in the individual instances by using information from the set of samples, but the samples must be homogeneous enough to not introduce further noise into the process. This paper evaluates the efficiency of several clustering algorithms and the associated parameters through cluster validity statistics and appearance of the resulting template image. Clustering algorithms that form tight clusters produce templates that highlight details, even though the number of available samples is smaller, while algorithms with larger clusters better capture the global shape of the characters.
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Elisa H. Barney Smith et al.BRCEffects of Circuit-Level Stress on Inverter Performance and MOSFET Characteristics
http://scholarworks.boisestate.edu/electrical_facpubs/299
http://scholarworks.boisestate.edu/electrical_facpubs/299Fri, 29 Jan 2016 09:07:14 PST
The effects of circuit-level stress on both inverter operation and MOSFET characteristics have been investigated. Individual MOSFETs, with gate oxide thickness of 3.2 nm and active dimensions of 25 µm × 25 µm, are connected in an inverter configuration off-wafer via a low-leakage switch matrix. Inverters are stressed with a ramped voltage stress (RVS) of various magnitudes to induce different degrees of gate oxide degradation. In addition, voltage transfer curves (VTCs) of degraded inverters are simulated using a new circuit model. At the transistor level, both the PMOSFET and the NMOSFET show increased gate leakage current up to eight orders of magnitude, severely reduced on-currents and transconductances (g_{m}), and large threshold voltage (V_{t}) shifts of 100 mV or more. Different trends in inverter performance are observed following positive and negative stress. However, regardless of the stress polarity, circuit-level stress results in inverter performance degradation, such as reduced output swing, switching point shifts, and increased rise/fall times. After the largest positive RVS, the output voltage swing has decreased from 1.8 V fresh, to 1.54 V post-stress. Much larger changes in the inverter voltage (V-t) time domain performance are observed. The minimum output low voltage is similar to that of the VTC, but the rise time increased significantly enough that the output voltage is only pulled up to 660 mV (V_{DD }= 1.8 V) before it switches low. In terms of circuit reliability, it may be possible for subsequent circuit stages to compensate for a few degraded devices, but increased rise/fall and delay times may cause timing issues in high-speed circuits. Furthermore, increased gate or off-stage leakage currents can potentially load previous circuit stages or result in increased power consumption.
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Nate Stutzke et al.BRCMaterials ScienceMechanical EngineeringLeakage Current Recovery in SRAM After AC Stressing
http://scholarworks.boisestate.edu/electrical_facpubs/298
http://scholarworks.boisestate.edu/electrical_facpubs/298Wed, 27 Jan 2016 15:48:12 PST
A recovery of sub-threshold current, measured as standby current has been seen on Static Random Access Memory (SRAM) devices after AC stress. A theoretical model is presented to explain the observed data in this paper. A trapped charge model is proposed for decrease in subthreshold current leading to lower observed standby current on continuous negative unipolar write stress. Several mechanisms have been proposed earlier such as Poole-Frenkel enhanced emission from traps, trap assisted tunneling, and band-to band tunneling to explain possible source of off current [5,9].
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Cesar Payan et al.BRCMaterials ScienceA New Equivalent Circuit of a Salient-Pole Synchronous Machine and Its Phasor Interpretation
http://scholarworks.boisestate.edu/electrical_facpubs/297
http://scholarworks.boisestate.edu/electrical_facpubs/297Wed, 06 Jan 2016 11:41:21 PST
This paper examines a shortcoming of the classical phasor diagram of a salient-pole synchronous machine based on the well-established two-reaction theory. Unlike in the phasor diagram of a smooth-air-gap machine, it is not possible to readily identify the internally-developed electromagnetic power of a salient-pole synchronous machine from this phasor diagram. By defining new machine reactances, a single equivalent circuit of a salient-pole synchronous machine is proposed together with a phasor diagram where the internally-developed electromagnetic power is made apparent. The revised two-reaction theory is illustrated using the mathematical model of a two-phase salient-pole synchronous machine whose equations are manipulated using complex space vectors instead of traditional matrix transformations.
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Said Ahmed-Zaid et al.Using Student Knowledge of Linear Systems Theory to Facilitate the Learning of Optical Engineering
http://scholarworks.boisestate.edu/electrical_facpubs/296
http://scholarworks.boisestate.edu/electrical_facpubs/296Tue, 05 Jan 2016 09:29:40 PST
For students learning a new topic, being able to use existing knowledge and mental models in the context of the new topic leads to faster learning and a deeper understanding of the new concepts. This paper describes how teaching a graduate-level course providing an introduction to optical engineering for students from multiple engineering majors can be facilitated by using existing concepts and knowledge of linear systems theory, which are common to them all.
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Cameron H.G. Wright et al.A Comprehensive Design Approach for a MZM Based PAM-4 Silicon Photonic Transmitter
http://scholarworks.boisestate.edu/electrical_facpubs/295
http://scholarworks.boisestate.edu/electrical_facpubs/295Wed, 16 Dec 2015 13:09:36 PST
A 4-level pulse amplitude modulation (PAM-4) silicon photonic transmitter targeting operation at 25 Gb/s is designed using an electrical-photonic co-design methodology. The prototype consists of an electrical circuit and a photonics circuit, which were designed in 130 nm IBM SiGe BiCMOS process and 130nm IME SOI CMOS process, respectively. Then the two parts will be interfaced via side-by-side wire bonding. The electrical die mainly includes a 12.5 GHz PLL, a full-rate 4- channel uncorrelated 2^{7} − 1 pseudo-random binary sequence (PRBS) generator and CML drivers. The photonics die is a 2-segment Mach-Zehnder modulator (MZM) silicon photonics device with thermal tuning feature for PAM-4. Verilog-A model for the MZM entails the system simulation for optical devices together with electrical circuitry using custom IC design tools. A full-rate 4-channel uncorrelated PRBS design using transition matrix method is detailed, in which any two of the 4-channels can be used for providing random binary sequence to drive the two segments of the MZM to generate the PAM-4 signal.
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Kehan Zhu et al.A CMOS Spiking Neuron for Dense Memristor-Synapse Connectivity for Brain-Inspired Computing
http://scholarworks.boisestate.edu/electrical_facpubs/294
http://scholarworks.boisestate.edu/electrical_facpubs/294Wed, 16 Dec 2015 11:29:33 PST
Neuromorphic systems that densely integrate CMOS spiking neurons and nano-scale memristor synapses open a new avenue of brain-inspired computing. Existing silicon neurons have molded neural biophysical dynamics but are incompatible with memristor synapses, or used extra training circuitry thus eliminating much of the density advantages gained by using memristors, or were energy inefficient. Here we describe a novel CMOS spiking leaky integrate-and-fire neuron circuit. Building on a reconfigurable architecture with a single opamp, the described neuron accommodates a large number of memristor synapses, and enables online spike timing dependent plasticity (STDP) learning with optimized power consumption. Simulation results of an 180nm CMOS design showed 97% power efficiency metric when realizing STDP learning in 10,000 memristor synapses with a nominal 1MΩ memristance, and only 13µA current consumption when integrating input spikes. Therefore, the described CMOS neuron contributes a generalized building block for large-scale brain-inspired neuromorphic systems.
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Xinyu Wu et al.